HIT-Kit Training Course
| General Information | |
|---|---|
| Date: |
Upon request |
| Duration: |
3 Days |
| Venue: | * |
| Language: | English |
| Course Fee: | EUR 1800,- |
| Participants: | min. 5, max. 10 |
| Registration Deadline: |
tbd |
|
* The training is usually held at our headquarters in Unterpremstaetten, but can also take place on-site. |
|
|
For more information and details please contact our local sales office |
|
| Description |
|---|
|
A three day intensive course on mixed-mode design
methodology.
The aim of this course is to enable designers of integrated circuits:
- to understand the design methodology for complex mixed-mode ASICs
Documentation provided on the course will greatly assist with the design of
ASICs.
The examples given are based on 0.35 micron CMOS technology and all design steps can be practiced on workstations. |
| Contents |
|---|
|
Day 1 - Introduction HIT-Kit and Technologies. - Digital Design Flow and Tutorials Overview. - Functional Verilog Simulation, Synthesis, Design Checker. - Gate Level Simulation, Timing Calculation, Test Vector Conversion. - Digital Standard Cell Place & Route, Back-Annotation. Day 2 - Analog Design flow & Tutorial Overview. - Spectre Simulation, Devices & Callback. - Introduction to SpectreHDL & VerilogA. - Analog Layout Generation using LayoutXL. - PCells, DRC, LVS, Parasitic Extraction. - Post Layout Simulation, GDSII Conversion. Day 3 - Corner & Monte Carlo Analysis. - Mixed-Signal Back-Annotation. - Design Partitioning, Interface Elements, Back-Annotation. |
| Audience |
|---|
Basic knowledge of CADENCE Analog Artist tools is mandatory! |







