Welcome to the 33rd edition of HIT-Kit NEWS our e-mail newsletter issued by the austriamicrosystems Full Service Foundry Business Unit containing news, facts and information to help you to get the best out of our design kits. In this edition you will find news about:

New HIT-Kit Version: austriamicrosystems has just released a new version of its best-in-class process design kit (HIT-Kit) for its 0.35µm High-Voltage CMOS technology

austriamicrosystems business unit Full Service Foundry released a new improved version of High-Voltage CMOS process design kit for foundry customers. The further improved industry benchmark design environment (“HIT-Kit”) contains a complete set of fully silicon-qualified standard cells, periphery cells and general purpose analog cells such as comparators, operational amplifiers, low power A/D and D/A converters. Custom analog devices, physical verification rule sets for Assura® DRC/LVS/EXT, as well as excellent characterized circuit simulation models enable rapid design starts of complex high performance mixed-signal ICs. Based on Cadence® Virtuoso® custom design IC 5.1.41, the new HIT-Kit supports entire chip design flow for foundry customers significantly improves and the time-to-market for highly competitive products in the analog intensive mixed signal arena.

The new HIT-Kit v3.72 is qualified for Cadence Virtuoso Custom Design IC 5.1.41 and may be used within Solaris, HP-UX and Linux operating systems.
HIT-Kit v3.72 features:

• Qualified for Solaris 7/8/9, Red Hat Linux 7.3, Red Hat EL 3.0
• Layout verification tool Assura 3.1.5
• CDL netlisting fully supported to generate Calibre netlists
• Graphical interface for Safe-Operating-Area-Check (SOAC)
• Full Setup and support for Cadence Multipart Paths objects
• Improved Monte Carlo simulation models
• Technology specific setup files for Synopsys Synthesis, VITAL, Verilog, Cadence PKS, and TLF.
• Libraries tested and qualified for Cadence NC-Sim (NC-Verilog, NC-VHDL and VerilogXL) and ModelSim 6.3
• Support for CDS AMS Designer + UltraSim
• Synopsys, VITAL, PKS, TLF and Verilog libraries
• First Encounter libraries available.
• Additional set of 20V devices available (NMOSxx & PMOSxx devices)
• Updated design documents:
  • 0.35µm 50V CMOS Process Parameters - ENG-238, rev 5
  • 0.35µm 50V CMOS Design Rules - ENG-243, rev 6
  • 0.35µm 20V CMOS Process Parameters - ENG-291, rev 2
  • 0.35µm 20V CMOS Design Rules - ENG-292, rev 2
  • 0.35µm 50V CMOS Parasitic Devices - ENG-298, rev 2

The complete HIT-Kit v3.72 related documentation is available online at http://asic.austriamicrosystems.com/hitkit/hk372.

If you would like to receive a copy of the HIT-Kit v3.72 CD-ROM please contact hitkit@austriamicrosystems.com.

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• ENG-182, 0.35µm C35 CMOS Process Parameters, rev. 5.0
• ENG-183, 0.35µm C35 CMOS Design Rules, rev. 6.0
• ENG-189, 0.35µm C35 CMOS Noise Parameters, rev. 4.0
• ENG-301, 0.35µm C35 CMOS DFM Rules, rev. 3.0
• ENG-225, 0.35µm S35 HBT BiCMOS Noise Parameters, rev. 2.0
• ENG-291, 0.35µm H35 20V CMOS Module Process Parameters, rev. 2.0
• ENG-243, 0.35µm H35 20V CMOS Module Design Rules, rev. 2.0
• ENG-238, 0.35µm H35 50V CMOS Process Parameters, rev. 5.0
• ENG-243, 0.35µm H35 50V CMOS Design Rules, rev. 6.0
• ENG-298, 0.35µm H35 50V CMOS Parasitic Devices, rev. 2.0
• ENG-244, 0.35µm H35 50V CMOS Noise Parameters, rev. 2.0

OTP block support for austriamicrosystems specialty technologies: austriamicrosystems’ offers silicon-qualified OTP blocks with a fixed layout to its foundry customers. For the high performance 0.35µm process technologies C35, S35 and H35 a 32bit and 128bit PPROM block with parallel interface as well as a sizable PPTRIM block (2bit to 64bit with serial interface) are available. In the 0.8µm process technologies CXQ (CMOS), CXZ (High Voltage CMOS) and BYQ (BiCMOS) a 16bit and 32bit EASYZAPP block with is available. For further details please refer to the related documentation on our ASIC server.

MPW Calendar 2008: austriamicrosystems’ offers 24 MPW runs for the technologies H18, H35, H35 Embedded Flash, C35, C35-Opto and S35. The detailed schedule is available on our web server at http://asic.austriamicrosystems.com/cot

FTP Server access: Please note that we have changed the IP address of our ftp server. In case you want to transfer data to austriamicrosystems (e.g. GDSII data for MPW participation) please log on to ftp.austriamicrosystems.com. Do not use the IP address anymore!

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January 04, 2008: austriamicrosystems becomes a member of the Industry Council on ESD Target Levels
austriamicrosystems’ business unit Full Service Foundry joins industry-wide group for ESD targets assessment. austriamicrosystems’ business unit Full Service Foundry today announced that it has joined the Industry Council on ESD Target Levels. The council is an independent body of ESD (Electro Static Discharge) experts with the mission to review the ESD robustness requirements of modern IC products for safe handling and mounting in an ESD protected area. >> Press Release

November 15, 2007: austriamicrosystems expands CMOS, High-Voltage, High-Voltage Flash and RF Multi Project Wafer Service for Foundry Customers
More extensive prototyping schedule for High-Voltage CMOS, High-Voltage CMOS Embedded Flash, SiGe-BiCMOS and CMOS specialty processes. austriamicrosystems’ business unit Full Service Foundry expands its cost-efficient and speedy ASIC prototyping service, known as Multi-Project Wafer (MPW) or shuttle run, with a more extensive schedule for 2008. The service which combines several designs from different customers onto one wafer allows sharing the costs for wafer and masks among a number of different shuttle participants. >> Press Release

October 04, 2007: austriamicrosystems releases new improved version of High-Voltage CMOS process design kit for foundry customers
New HIT-Kit v3.72 comes complete with additional 20V devices and special utilities optimized for High-Voltage CMOS product design. austriamicrosystems’ business unit Full Service Foundry announced today a further improvement of its industry benchmark design environment (“HIT-Kit”) for its advanced 0.35µm High-Voltage CMOS process H35. It is ideally suited for high voltage product design like power management products, display drivers, sensors and sensor interfaces and any kind of automotive applications just to name a few. >> Press Release

September 12, 2007: austriamicrosystems offers additional 20V devices for its advanced 0.35µm High-Voltage CMOS process
The 0.35µm High-Voltage CMOS process H35 fully supports supply voltages from 3.3V to 120V on a single chip. austriamicrosystems’ Full Service Foundry business unit announced at the Fabless Semiconductor Association (SA) Supplier Expo in Santa Clara the offering of its leading edge 0.35µm High-Voltage CMOS technology H35 with an additional set of 20V NMOS and PMOS devices. The new extension allows the integration of 3.3V, 5V, 20V, 50V and 120V devices on a single chip without any process changes. >> Press Release

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You have been reading the 33rd edition of "HIT-Kit NEWS". Feel free to distribute it to colleagues who might be interested! All previous issues of "HIT-KIT NEWS" are here. Any questions or comments? Feel free to send an email to hitkit@austriamicrosystems.com

If you do not want to receive any future HIT-Kit NEWS please send an email to hitkit@austriamicrosystems.com. Copyright (c) January 2008 by austriamicrosystems AG, A - 8141 Unterpremstaetten, Austria. All rights reserved. Product and company names mentioned herein may be registered trademarks of their respective owners.