HIT-Kit News, vol. 31

Welcome to the 31st edition of HIT-Kit NEWS our e-mail newsletter issued by the austriamicrosystems Full Service Foundry Business Unit containing news, facts and information to help you to get the best out of our design kits. In this edition you will find news about:

• New HIT-Kit v3.71 available
• Results from our EEPROM / Flash IP Block Survey
• Updated Design Documents
• Updated Circuit Simulation Parameters
• HIT-Kit Training & Technical Seminar
• Newsflash
• austriamicrosystems in the News

New HIT-Kit Version: austriamicrosystems launches its new 0.35µm High-Voltage CMOS Process Design Kit for Foundry Customers.
 
Please note that the new HIT-Kit v3.71 replaces all previous HIT-Kit versions for the 0.35um High-Voltage CMOS process technology H35.
 
The new HIT-Kit v3.71 for the 0.35µm High-Voltage CMOS technology H35 has been qualified for Cadence® custom design Virtuoso® Platform version IC 5.1.41 and includes

• Updated 0.35µm 50V CMOS Process Parameters document ENG-238, rev 4.0
• Updated 0.35µm 50V CMOS Design Rules document ENG-243, rev 4.0
• Updated verification rule files for Assura and Calibre according to ENG-243 Rev 4.0 (DRC, LVS and RCX)
• Safe-Operating-Area-Check (SOAC) for all primitive Devices
• Device generators for all low and high voltage devices (PCells).
• Device RPOLY1 available through whole design flow as qualified devices
• All circuit simulator models updated
• Parasitic PNP modelled in the parasitic models
• Probing of individual substrate currents for each device possible
• Guard Ring Generator added to the Layout HIT-Kit utilities menu
• Updated IOLIB_HV_3M and IOLIB_HV_4M (protection cells RAILPROT_xxx)
• Updated IOLIB_ANA_HV_3M and IOLIB_ANA_HV_4M (supply pads, powercut cells, protection cells for 3.3V, 5V, 20V and 50V analog cells)

To meet our customers' demands also in terms of flexibility, the HIT-Kit supports, beside RedHat Linux 7.3 also RedHat Enterprise Linux 3.0, Sun Solaris 9 and HP-UX11 operating systems. For more detailed information please refer to the related HIT-Kit Release Notes and the supported environment.

The new HIT-Kit CD-ROM is now ready to be dispatched! If you would like to receive a copy of the HIT-Kit v3.71 CD-ROM please complete the Online Request Form.

• ENG-238, 0.35µm 50V CMOS Process Parameter, rev 4.0
• ENG-243, 0.35µm 50V CMOS Design Rules, rev. 4.0

• H35: Eldo, HSpiceS and Spectre models updated acc. to ENG-238, rev 4.0

Get the current simulation models for the various technologies from our Download Area now!  

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IC Technology and IC Design Training

austriamicrosystems, Luleå University of Technology and Europractice offer a two day training on austriamicrosystems' process design kit ("HIT-Kit") and a half day technical seminar on austriamicrosystems' High-Voltage CMOS process ("H35"). Both seminars take place at Luleå University of Technology:

HIT-Kit Training: A two day intensive course on mixed-mode design methodology. The aim of this course is to enable designers of integrated circuits to understand the design methodology for complex mixed-mode ASICs as well as to gain insight into the austriamicrosystems design flow. This 2 day intensive course for digital, analog and mixed-signal designers is the ideal chance to experience the power of our best-in-class HIT-Kit using state-of-the-art tools from Cadence (Ambit BuildGates, Assura, ...).

 

High-Voltage CMOS Technical Seminar: This seminar focuses on current best practices for implementing High-Voltage designs from specification to working silicon. The 0.35µm High-Voltage CMOS process will be described with cross sections and SEM micrographs. 0.35µm High-Voltage products, currently in manufacturing, will be shown with a focus on demonstrating the integration and performance capability of the technology. austriamicrosystems DFM-enhanced reference High-Voltage design flow will be presented, which utilizes specific analog/High-Voltage DFM tools such as design and layout verification of circuit robustness, yield centering, parasitic simulation or safe operating area check.

For more detailed information, course schedule and registration please refer to the Luleå University of Technology web page.

This event is hosted by the following organizations:
 

http://www.ltu.se/web	http://www.austriamicrosystems.com	http://www.europractice.com

Update your ASIC user profile: In order to ensure license file delivery as well as to supply newsletters, document updates and alert information to you, we kindly ask all registered users on our ASIC Server to update their ASIC user profile.

MPW Calendar 2006: austriamicrosystems celebrates 20 years of Multi Project Wafer Service for Foundry Customers
austriamicrosystems’ pioneered the Multi Project Wafer service concept and celebrates the 20 years of offering a cost-efficient and fast ASIC prototyping service by combining several designs from different customers onto one wafer. This successful approach, known as Multi-Project Wafer (MPW) or shuttle run, allows to share the costs for wafer and masks among a number of different customers. In 2006, austriamicrosystems offers 20 MPW runs (plus 4 additional runs at Fraunhofer IIS) for the technologies C35, H35, S35, C35-Opto and C35-EEPROM. The detailed schedule is available on our web server at http://asic.austriamicrosystems.com/MPW.

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You have been reading the 31st edition of "HIT-Kit NEWS". Feel free to distribute it to colleagues who might be interested! All previous issues of "HIT-KIT NEWS" are here. Any questions or comments? Feel free to send an email to hitkit@austriamicrosystems.com

If you do not want to receive any future HIT-Kit NEWS please send an email to hitkit@austriamicrosystems.com. Copyright (c) February 2006: by austriamicrosystems AG, A - 8141 Unterpremstaetten, Austria. All rights reserved. Product and company names mentioned herein may be registered trademarks of their respective owners.