HIT-Kit News, vol. 29

 

 


Dear HIT-Kit User !

 

Welcome to the 29th edition of HIT-Kit NEWS our e-mail newsletter issued by the austriamicrosystems Full Service Foundry Business Unit containing news, facts and information to help you to get the best out of our design kits. In this edition you will find news about:

 

NEW MENTOR HIT-Kit v3.70 AVAILABLE NOW


austriamicrosystems supports entire chip design flow for foundry customers. The new HIT-Kit v3.70, qualified for the latest release of Mentor Graphics' design tools, may be used within Solaris and Linux operating systems and includes the technologies

  • 0.35µm High-Voltage CMOS (H35)
  • 0.35µm SiGe-BiCMOS (S35)
  • 0.35µm CMOS (C35)

The new Mentor HIT-Kit v3.70 has been tested and qualified with Mentor's new toolset IC-Flow 2005.1 and is austriamicrosystems' first HIT-Kit that supports Mentor's ICStudio including Classic DA-IC and IC-Station. Additionally the simulators Modelsim, Eldo and ADMS as well as Mentor's routing tools AutoCells, ICassemble and IRoute are supported. austriamicrosystems first-time offers a Mentor based design kit for its advanced High-Voltage CMOS process H35. A complete set of core and periphery libraries, both substrate based and floating, are included in the new HIT-Kit v3.70.

For more detailed information please refer to the related HIT-Kit Release Notes.

To receive a copy of the Mentor HIT-Kit v3.70 DVD please complete the Online Request Form.
 

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DID YOU KNOW...

austriamicrosystems Full Service Foundry team has launched its High-Voltage CMOS Designers Forum on its web server. It provides the possibility to gain detailed design knowledge and process related information and offers you:
  • H35 device selector
  • H35 process related information
  • FAQ section
  • Tool description (e.g. SOAC tool)
  • Design documents

>>  Enter the High-Voltage CMOS Designers Forum  <<

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UPDATED DESIGN DOCUMENTS

The following design documents have been revised or newly released. Please download the updated documents from our Download Area:

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UPDATED CIRCUIT SIMULATION PARAMETERS

The following circuit simulation models for the various simulators and technologies have been updated recently:
  • H35: Spectre, ELDO & HSPICE noise parameters updated corresponding to process parameter document Eng-244, Rev.1

Get the current simulation models for the various technologies from our Download Area now!  

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HIT-Kit UPDATES

The following updates and add-ons available for the Cadence HIT-Kit v3.70 have been released recently:
CMOS (C35) - Diva: Support of new RF devices according to ENG-188, rev.4.0
- Assura: Support of new LVT devices according to ENG-282, rev.1.0
- LVT-Option: New devices for low threshold voltage process according to ENG-282, rev.1.0
- PCells: New devices for low threshold process according to ENG-282, rev.1.0
SiGe-BiCMOS (S35) - Diva: Support of new RF devices according to ENG-221, rev.2.0
High-Voltage CMOS (H35) - Update for VerilogIn, VerilogXL and spectreVerilog.

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NEWSFLASH


EEPROM / Flash Survey: austriamicrosystems will start a online survey soon asking your EEPROM / Flash IP block requirements for the current 0.35µm technologies as well as for future technologies. You will receive an email soon.

 

The High-Voltage CMOS Technical Seminar held prior to the FSA Expo 05 in San Jose was a big success for all participants and for austriamicrosystems AG. Thanks to all of you for your interest in our DFM (Design-for-manufacturing) enhanced design flow for High-Voltage product design and yield maximization and for providing your feedback to the seminar.

 

Advanced low threshold CMOS process available for foundry customers: austriamicrosystems has further expanded its foundry technology portfolio with an advanced low threshold (LVT) CMOS process based on its proven 0.35µm mixed-signal CMOS technology. With only two additional mask levels the LVT process module offers a set of low threshold devices in addition to the 3.3V and 5.0V devices available in the C35 base process. High integration density and full modularity to the C35 base process (IP block reuse) makes the 0.35µm LVT CMOS process an ideal technology for high performance analog standard products.

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austriamicrosystems IN THE NEWS

October 05, 2005: austriamicrosystems partners with MOSIS to serve foundry customers in North America
Further expansion of MOSIS foundry services for CMOS, High-Voltage CMOS and RF SiGe-BiCMOS process manufacturing. austriamicrosystems’ business unit Full Service Foundry and MOSIS announced at the FSA (Fabless Semiconductor Association) Supplier Expo in San Jose, to cooperate to support smaller volume customers especially in North America. >> Press Release

 

October 04, 2005: austriamicrosystems supports Design for Manufacturing (DFM) reference design flow for its High-Voltage CMOS process technology
DFM enhanced design flow for High-Voltage product design helps to maximize customers’ yield. austriamicrosystems’ business unit Full Service Foundry announced today the availability of its Design for Manufacturing (DFM) reference design flow for its High-Voltage CMOS process. >> Press Release

 

September 28, 2005: austriamicrosystems and DELTA cooperate for Nordic region
Delta offers ASIC solutions including backend services utilizing austriamicrosystems' wafer manufacturing capabilities. austriamicrosystems’ business unit Full Service Foundry and DELTA Danish Electronics, Light & Acoustics announced today to cooperate on lower volume analog and mixed-signal ASIC solutions for Northern Europe. >> Press Release

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FEEDBACK


You have been reading the 29th edition of "HIT-Kit NEWS". Feel free to distribute it to colleagues who might be interested! All previous issues of "HIT-KIT NEWS" are here. Any questions or comments? Feel free to send an email to hitkit@austriamicrosystems.com

If you do not want to receive any future HIT-Kit NEWS please send an email to hitkit@austriamicrosystems.com. Copyright (c) October 2005: by austriamicrosystems AG, A - 8141 Unterpremstaetten, Austria. All rights reserved. Product and company names mentioned herein may be registered trademarks of their respective owners.
 

 

 

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