HIT-Kit News, vol. 26

Dear HIT-Kit User !

Welcome to the 26th edition of HIT-Kit NEWS our e-mail newsletter issued by the austriamicrosystems Full Service Foundry Business Unit containing news, facts and information to help you to get the best out of our design kits. In this edition you will find news about:

• austriamicrosystems PDKs support Cadence First Encounter
• Did you know...
• Updated Design Documents
• Updated Circuit Simulation Parameters
• Updated HIT-Kit Patch Files
• Short Cuts
• austriamicrosystems in the News
• Support during X-Mas

austriamicrosystems now fully supports First Encounter for Place & Route for its 0.35µm technologies. First Encounter is the state-of-the-art digital Place & Route tool provided by Cadence Design Systems. First Encounter is available for the technologies 0.35µm CMOS (C35), 0.35µm SiGe BiCMOS (S35) and 0.35µm CMOS High Voltage (H35) for Sun/Solaris and Linux operating systems.

For an easy design kit integration a patch file including a comfortable startup utility as well as all required physical libraries (LEF files) and timing libraries (Synopsys .lib files) is available on our ASIC Server.

Read more details about First Encounter in the related User's Guide.

Contact hitkit@austriamicrosystems.com for more information.

Did you know that there is a Bonding Diagram Editor included in our HIT-Kit?

This powerful and useful tool includes about 250 of the most commonly used (RF) package types and enables you to perform an automatic generation of your bonding diagram ready for the Assembly Department. To save time the Bonding Diagram Editor let you easily extract R and L of bond wires. The included check procedure performs a design rule check according to the Assembly Related Design Rules document ASSY-15.

The following Design Documents have been revised or newly released. Please download the updated documents from our Download Area:

• 0.35µm CMOS C35 Process Parameters ENG-182, Rev 3
• 0.35µm CMOS C35 Design Rules ENG-183, Rev 4
• 0.35µm HBT BiCMOS S35 Design Rules ENG-218, Rev 5
• Assembly Related Design Rules ASSY-15, Rev 6
• Standard Marking Limitations ASSY-124, Rev 8
• Package List ASSY-168, Rev 14
• Product Assurance Manual QTY-1 Rev 17




 

Keep your HIT-Kit up to date! The following patches available for the 0.35µm technologies C35, S35 and H35 have been released recently:

Updated Datasheets: The revised datasheets for the analog standard cells included in the 0.35µm library A_CELLS are available on our ASIC Server in section Libraries and Datasheets.

HV Technical Seminar & HIT-Kit Training: austriamicrosystems offers a half day High Voltage Process Workshop and a HIT-Kit Training for Europractice members at Fraunhofer IIS in Erlangen. For registration and more details on these two seminars please refer to http://www.iis.fraunhofer.de/asic/svasic/seminar/index.html.

Customer Engineering Input Document has been updated. This document provides important information which must be considered when a layout database is supplied for foundry services to austriamicrosystems. Download the latest revision here!

November 12, 2004: austriamicrosystems launches field-programmable OTP memory solution.
The new polyfuse-based OTP memory cells allow analog trim and other parameters to be stored in ICs designed on CMOS baseline process. austriamicrosystems business unit Full Service Foundry announced at the electronica 2004 EXPO, a further extension of its foundry IP & technology portfolio with the launch of the industry's most economical OTP (one-time-programmable) memory capability for CMOS-baseline processes. >> Press Release

November 11, 2004: austriamicrosystems' new process design kit supports HV CMOS chip design for manufacturing.
HIT-Kit V3.61 design for manufacturing-enhanced design flow for analog/high voltage product design austriamicrosystems business unit Full Service Foundry announced at the electronica 2004 EXPO in Munich the availability of its 50V 0.35µm High-Voltage CMOS Process Design Kit (HIT-Kit V3.61) with integrated DFM features. Using the new HIT-Kit allows optimization towards yield and robustness of the design during the design process, thus enabling considerable bottom line improvements for the ramp up of a project. >> Press Release

October 22, 2004: austriamicrosystems achieves certification according to ISO 13485:2003 with excellent results.
Successful audit of new international quality management standard for medical devices demonstrates industry-leading quality management at austriamicrosystems AG. austriamicrosystems is proud to announce the successful first audit and certification of its quality management system according to ISO 13485:2003, the recently introduced international quality management standard for designers and manufacturers of medical devices. >> Press Release

October 6, 2004: austriamicrosystems' industry leading CMOS High Voltage process now available for foundry customers
austriamicrosystems business unit Full Service Foundry announced today at the Fabless Supplier EXPO in San Jose the availability of its fully automotive qualified CMOS 50V High Voltage process for the 0.35µm technology platform. This process is a modular extension of the 0.35µm CMOS licensed from TSMC permitting reuse of digital design. >> Press Release

Please note that the Design Support office in Austria will provide limited support via email only from Friday, 24th of December 2004 until Monday 3rd of January 2005. During this time please send all questions directly to

hitkit@austriamicrosystems.com

or check our web pages at

http://www.austriamicrosystems.com
http://asic.austriamicrosystems.com
FAQ & Reporting System