HIT-Kit News, vol. 26
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Dear HIT-Kit User !
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austriamicrosystems now fully supports First Encounter for Place & Route for its 0.35µm technologies. First Encounter is the state-of-the-art digital Place & Route tool provided by Cadence Design Systems. First Encounter is available for the technologies 0.35µm CMOS (C35), 0.35µm SiGe BiCMOS (S35) and 0.35µm CMOS High Voltage (H35) for Sun/Solaris and Linux operating systems. For an easy design kit integration a patch file including a comfortable startup utility as well as all required physical libraries (LEF files) and timing libraries (Synopsys .lib files) is available on our ASIC Server. Read more details about First Encounter in the related User's Guide. Contact hitkit@austriamicrosystems.com for more information. >> back to top |
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This powerful and useful tool includes about 250 of the most commonly used (RF) package types and enables you to perform an automatic generation of your bonding diagram ready for the Assembly Department. To save time the Bonding Diagram Editor let you easily extract R and L of bond wires. The included check procedure performs a design rule check according to the Assembly Related Design Rules document ASSY-15. Read more information about the Bonding Diagram Editor >> back to top
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The following Design Documents have been revised or newly released. Please download the updated
documents from our Download Area:
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The following circuit simulation models for the various simulators and technologies have been updated recently:
Get the actual simulation models for the various technologies from our Download Area now! >> back to top
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Keep your HIT-Kit up to date! The following patches available for the 0.35µm technologies C35, S35 and H35 have been released recently:
All HIT-Kit patch files for the various technologies are available on our Download Area!
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Updated Datasheets: The revised datasheets for the analog standard cells included in the 0.35µm library A_CELLS are available on our ASIC Server in section Libraries and Datasheets. HV Technical Seminar & HIT-Kit Training: austriamicrosystems offers a half day High Voltage Process Workshop and a HIT-Kit Training for Europractice members at Fraunhofer IIS in Erlangen. For registration and more details on these two seminars please refer to http://www.iis.fraunhofer.de/asic/svasic/seminar/index.html. Customer Engineering Input Document has been updated. This document provides important information which must be considered when a layout database is supplied for foundry services to austriamicrosystems. Download the latest revision here! Environmental Statement: austriamicrosystems is committed to responsible visionary environmental management. Based on this commitment, austriamicrosystems has been one of the first semiconductor manufacturers to be certified in accordance with ISO 14001 and validated under EMAS (Eco Management and Audit Scheme). Read more .. >> back to top
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November 12, 2004:
austriamicrosystems launches field-programmable OTP memory solution. November 11, 2004:
austriamicrosystems' new process design kit supports HV CMOS chip design for manufacturing. October 22, 2004:
austriamicrosystems achieves certification according to ISO 13485:2003 with excellent results. October 6, 2004:
austriamicrosystems' industry leading CMOS High Voltage process now available for foundry customers
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Please note that the Design Support office in Austria will provide limited support via email only from
Friday, 24th of December 2004 until Monday 3rd of January 2005. During this time please send all questions directly to hitkit@austriamicrosystems.com or check our web pages at http://www.austriamicrosystems.com >> back to top
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If you do not want to receive any future HIT-Kit NEWS please send an email to hitkit@austriamicrosystems.com . Copyright (c) December 2004: by austriamicrosystems AG, A - 8141 Unterpremstätten, Austria. All rights reserved. Product and company names mentioned herein may be registered trademarks of their respective owners. |
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Did you know that there is a Bonding Diagram Editor included in our HIT-Kit?


