HIT-Kit News, vol. 25

 

 

Dear HIT-Kit User !


Welcome to the 25th edition of HIT-Kit NEWS our e-mail newsletter issued by the austriamicrosystems Full Service Foundry Business Unit containing news, facts and information to help you to get the best out of our design kits. In this edition you will find news about:

 

austriamicrosystems ANNOUNCES NEW 0.35µm CMOS HIGH-VOLTAGE TECHNOLOGY
  

austriamicrosystems AG has released its leading edge "H35" 0.35µm High-Voltage technology for mass production in its state-of-the-art 200mm SMIF fab. This process is offered for 20V and 50V operating voltages, an extension for higher voltages is planned for the future. H35 is the first purely CMOS based High Voltage process on the market that matches BCD performance and chip sizes at much lower complexity. It is based on the 0.35µm CMOS process transferred from TSMC. Rigorous modularity permits 100% reuse of low voltage CMOS designs IP.

H35 offers fully scalable High-Voltage NMOS and PMOS devices, floating logic libraries as well as a best-in-class power-on resistance. This makes H35 ideal for power management products, display drivers, sensors just to name a few.

H35 Key Facts:

  • 100% Compatible with 3.3V / 5V CMOS base Process
  • Optimized HV devices leading to 50% smaller HV area compared to standard CMOS-HV (Patent pending)
  • Very competitive "on resistance"
  • 50V PMOS, NMOS and Floating NMOS Transistors available
  • Symmetrical NMOS50 and PMOS50 Devices
  • 3 Gate-Oxide Thicknesses on one Chip (3.3V, 5.0V and 20V)
  • Area optimised 20V MOS Transistors available
  • Additional HV Capacitors, Bipolars and JFETs
  • Additional Passive Devices (Floating Diodes, RPWELL)
  • Comprehensive design environment - HIT-Kit available (see below)

Related design documents are available on our web server at http://asic.austriamicrosystems.com/

 

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NEW CADENCE HIT-Kit v3.61
  

austriamicrosystems launches new 0.35µm Mixed Signal Process Design Kit for Foundry Customers. The Cadence Mixed-Signal HIT-Kit v3.61 for the technologies

0.35µm H35B3 (HV CMOS, 3-metal)
0.35µm H35B4 (HV CMOS, 4-metal)

is now ready to be dispatched! The new version has been qualified for Cadence IC 5.0.33 and contains the high performance 0.35µm process technology H35 (CMOS HV) including

  • new verification rule files for Assura and Calibre
  • Device generators for all low and high voltage devices (PCells).
  • Floating Digital Standard Cells (CORELIB_HV)
  • Floating 3 Metal Digital Input/Output/Bi-directional buffers & Power Pads (IOLIB_HV_3M)
  • Floating 4 Metal Digital Input/Output/Bi-directional buffers & Power Pads (IOLIB_HV_4M)
  • High Voltage 3 Metal Analog Power Supply Pads, Analog I/O Pads for 20V and 50V (IOLIB_ANA_HV_3M)
  • High Voltage 4 Metal Analog Power Supply Pads, Analog I/O Pads for 20V and 50V (IOLIB_ANA_HV_4M)
  • Safe-Operating-Area-Check (SOAC) for all primitive Devices

To meet our customers demands also in terms of flexibility, the HIT-Kit supports, beside Linux, also Sun Solaris and HP-UX operating systems. For more detailed information please refer to the related HIT-Kit Release Notes.

To install the HIT-Kit CD-ROM and to use all the HIT-Kit features a license file (FlexLM) is required. The license file can be easily generated on our web server at http://asic.austriamicrosystems.com.

If you would like to receive a copy of the HIT-Kit v3.60 CD-ROM please complete the Online Request Form.

 

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austriamicrosystems CMOS HIGH VOLTAGE TECHNICAL SEMINAR
  

"CMOS High Voltage, an alternative to BCD processes"

An introduction to High Voltage Design Techniques and to austriamicrosystems CMOS High Voltage Processes

austriamicrosystems CMOS High Voltage is a new generation advanced analog and mixed-signal technology, ideally suited for a wide variety of applications; power management, motor control, print drivers, DC/DC converters, switched power supplies, LCD drivers and backlight controllers, to name a few.

austriamicrosystems "Full Service Foundry" philosophy is to work with its customers to offer an optimal solution for first time right silicon including extended design support services. As part of this service, austriamicrosystems is pleased to announce a complimentary half day High Voltage Process Workshop with the following agenda:

 
  • 1:00 pm - 1:30 pm:  Registration and Coffee
  • 1:30 pm - 1:40 pm:  Welcome and Introduction
  • 1:40 pm - 2:00 pm:  Technology Roadmap Update
  • 2:00 pm - 2:45 pm:  High Voltage Technology Overview
  • 2:45 pm - 3:00 pm:  ESD Techniques for High Voltage
  • 3:00 pm - 3:30 pm:  HV-Design Techniques
  • 3:30 pm - 3:45 pm:  Coffee
  • 3:45 pm - 5:00 pm:  Building Blocks and Applications in HV
  • 5:00 pm - 5:30 pm:  Questions and Answers
  • 5:30 pm:                  Cocktails - open discussion
   

   Date:       Tuesday, 5th Oct. 2004
   Venue:   Hilton San Jose & Towers
                    300 Almaden Boulevard
                    San Jose, CA 95110
                    United States

 

COST: Free to attend !

During this Seminar there will be the opportunity to discuss (both formally and informally) many aspects of the High-Voltage Technology and Design techniques with experienced users of this new generation process.

Seating for this seminar is limited, to ensure your place please simply send an email to foundry@austriamicrosystems.com with your contact details (name, company & telephone number) and the number of seats your require.

Description of the Seminar: 
This seminar focuses on current best practices for implementing High-Voltage Designs from specification to working silicon. The austriamicrosystems' technology roadmap will be discussed. The 0.35µm CMOS High Voltage process will be described with cross sections and SEM micrographs. Some 0.8µm and 0.35µm High Voltage products, currently in manufacturing, will be shown with a focus on demonstrating the integration and performance capability of the technology. The final section on High Voltage models and design kits will conclude the seminar.

For more information, please contact Douglas Pattullo at +1-408-345-1790 or foundry@austriamicrosystems.com now!

 

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S35 PROCESS PARAMETER CHANGES
  

Within the scope of continuous improvement of austriamicrosystems' products and processes we are pleased to inform you about the availability of the new version of our 0.35µm SiGe process S35. This new S35 (nickname IDP version - or V3.0) simplifies your design and ensures an even more compact chip design for your application.

Below you'll find a brief overview and description of the differences to the existing process flow (V2.0). The details (process and simulation parameters and also the updated Hit-Kit) are available on our technical webserver:

Overview of the process-update: The main improvement concerns the emitter poly deposition in the S35 process which is now realised with a method called in-situ-doped emitter poly (IDP):

Advantages:
  • Better uniformity of emitter doping
  • Better linearity of beta vs. Ic for small Ic- currents
  • Higher Ic for same Vbe
  • Ft/fmax data stay the same
  • Higher RPOLYB enables smaller resistors on the chip
Major parametrical changes:
  • IS2B2N(H) increases by ~ 4x
    old: 0,35 - 1,0 typical 0,7 aA/µm
    new 1,40 - 4,5 typical 2,9
  • RPOLYB
    old: 140 - 200 typical 170 Ohm/#
    new 200 - 280 typical 240

The updated models and design kit are already available. From now on austriamicrosystems will only support the new S35 V3.0 for production. If required, we will be pleased to support you with any potential change in your V2.0 design. Please discuss the details with your austriamicrosystems' contact person.

 

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DID YOU KNOW...
  

Did you know that there is a SOAC Check (Safe Operating Area Check) included in our HIT-Kit? SOAC is mandatory for robust high voltage design. Using SOAC you check the operating area of each device included in your design according to the related Process Parameter document. The SOAC checker works within Spectre/Analog Artist and includes special models and a Graphical User Interface (GUI). The features of this powerful tool are: 
  • Verilog-A Watchdog which reports voltage levels outside the SOA and forward-biased parasitic diodes
  • Checks operating area of each device according to TIPs document
  • Available within the HIT-Kit (implemented in Spectre/Analog Artist)
  • No Change in Schematic
  • Moderate simulation time adder
  • HIT-Kit offers full GUI

 

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UPDATED DESIGN DOCUMENTS
  

The following Design Documents have been revised or newly released. Please download the updated documents from our Download Area:

 

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UPDATED CIRCUIT SIMULATION PARAMETERS
  

The following circuit simulation models for the various simulators and technologies have been updated:

S35:

- Circuit simulation models for the simulators Eldo, EldoS, Hspice, Smash, SpectreS, Spectre Direct, SmartSpice and ADSsim updated according to Process Parameter document ENG-219, rev. 3.

H35:

- Circuit simulation models for the simulators Eldo, Hspice and Spectre Direct released according to Process Parameter document ENG-238, rev. 2.

Get the actual simulation models for the various technologies from our Download Area now!

 

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SHORT CUTS
  

FSA Suppliers Expo: The Fabless Semiconductor Association's (FSA) 2004 Suppliers Expo is the premier event dedicated to bringing together suppliers, fabless companies, IDM's, OEMs and other organizations that play a vital role in the semiconductor industry. Visit austriamicrosystems and talk to our experts about our technologies, design environment and our "Full Service" package. We will also be presenting a live demo of the latest version of our CAD design environment - the HIT-Kit - at our booth No. 501/503.

 

Next HIT-Kit The next major HIT-Kit release will be available on DVD only! Are you able to read DVSs? Please tell us your opinion at hitkit@austriamicrosystems.com.

 

New Datasheets: The newly created datasheets for the floating digital standard cells included in the 0.35µm high voltage libraries CORELIB_HV, IOLIB_HV_3M and IOLIB_HV_4M are available on our ASIC Server in section Libraries and Datasheets.

 

HIT-Kit Documentation: All HIT-Kit v3.61 related documentation (Release Notes, tool description, installation procedure and setup, and many more) is now available on our web server: HIT-Kit v3.61

 

Interested to work for austriamicrosystems? We are constantly on the look out for highly skilled and highly motivated team members who would like to enjoy the excitement of working for a successful company. Visit our Jobs & Career-site.

 

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austriamicrosystems IN THE NEWS
  

August 27, 2004: austriamicrosystems congratulates Kate Allen and Polar on Olympic victory. austriamicrosystems chip at the heart of gold medal winner's Polar heart rate monitor watch. austriamicrosystems AG, the leading designer and manufacturer of highly integrated analog intensive mixed signal ICs, congratulates Kate Allen and Polar Electro Oy, the world's leading producer of heart-rate monitors, on winning the gold medal in the Olympic triathlon race at the 2004 Olympics in Athens. >> Press Release

 

August 3, 2004: Wacom Components and austriamicrosystems Complete Design of World's First Single Chip for Pen-based Mobile Interface. Advanced design to allow improved mobile user experience and enable next generation applications. Wacom Components and austriamicrosystems AG, today announced a significant milestone in the evolution of Wacom's mobile interface strategy with the successful silicon design of the world's first single chip pen input solution for the mobile OEM market. The single chip ASIC has been jointly developed by the two companies. >> Press Release

 

July 23, 2004: austriamicrosystems is the first to fully comply with Mixed-Signal/RF Process Design KIT guidelines from FSA. A standard checklist of PDK contents showcases austriamicrosystems' superior quality of devices and tools available. austriamicrosystems' Full Service Foundry announces that it is the first to adopt the Fabless Semiconductor Association (FSA) mixed-signal/RF Process Design Kit (PDK) guidelines for it's foundry customers. A PDK is a set of data files that enables analog circuit and layout designers to efficiently design an integrated circuit (IC) using a set of electronic design automation (EDA) tools in a selected foundry process. >> Press Release

 

July 6, 2004: austriamicrosystems Adopts Nassda HSIM for High-performance RF and High-Voltage Design. Nassda Corporation (Nasdaq: NSDA) announced today that mixed-signal semiconductor foundry austriamicrosystems AG has adopted Nassda's full-chip circuit simulation and analysis tool, HSIM, for verification of high-performance designs for austriamicrosystems' communication, automotive, industry & medical and foundry service customers. HSIM has verified over 10 designs in CMOS, BiCMOS and silicon germanium (SiGe) process technologies for the Full Service Foundry group of austriamicrosystems. >> Press Release

 

 

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FEEDBACK
  


You have been reading the 25th edition of "HIT-Kit NEWS". Feel free to distribute it to colleagues who might be interested! All previous issues of "HIT-KIT NEWS" are here. Any questions or comments? Feel free to send an email to hitkit@austriamicrosystems.com

If you do not want to receive any future HIT-Kit NEWS please send an email to hitkit@austriamicrosystems.com . Copyright (c) September 2004: by austriamicrosystems AG, A - 8141 Unterpremstätten, Austria. All rights reserved. Product and company names mentioned herein may be registered trademarks of their respective owners.