Safe Operating Area Check

 

In high voltage designs a number of different transitors work at different operating points. The Safe Operating Area Check (SOAC) traces the operating point of each transistor in the design and reports warnings if the safe operating region is left. The Safe Operating Area Checker uses Verilog-A modules to trace the voltages of each device, therefore a Cadence Verilog-A license is required. The warnings are written to the standard spectre output log and also to a file named <analysis>.soac.err in the spectre results direcorty(eg: Sim/<circuitName>/spectre/schematic/psf/tran.soac.err).
After the simulator has terminated the SOAC Post Processor can be started, this tool shows all SOAC violations and allows a crossprobing between Error message, Waveforms and Schematic.

 

Usage/Analog Artist Integration

Each device included in the Process Parameter Document has a SOAC model. The SOAC models are defined in a separate directory under the spectre model path. Simulation with SOAC is mandatory in H35 and therefore the SOAC models are set by default when starting spectre. Using the HIT-Kit will not require any additional steps to setup a Safe Operating Area Check.
In the HIT-Kit the spectre models which include SOAC and all Device parasitics are set by default:

  • Model Libraries

    Check the Model Liberaries:

      Setup->Model Libraries ...

    modellibraries

    Also check the Simulation Files:

      Setup->Simulation files ...

    simulationFiles
    Note: The mcparams.scs files is required to include the SOAC models.

  • Before starting the simulation the Substrate node has to be defined

    For some Devices checks between a Device pin and the substrate exist. The checker uses a global node psub! as Substrate, therefore a global node psub! has to be defined in the schematic.
    This node is referenced in the models and must be given a specified voltage to the ground by a voltage source.
    If the substrate is at 0 V specify a 0V - voltage source (this is also useful for probing of the substrate current):

    psub

 

Now everything should be set up correct, and you can run your simulation as normal. During the simulation every violation to the SOA is announced in the simulator output log, and after a simulation has finished you will find a result file of the SOA Check in

<simulation directory>/<circuit name>/spectre/schematic/psf/<analysis>.soac.err

for example, for a ciruit called soac_test the result file is called
./Sim/soac_test/spectre/schematic/psf/tran.soac.err
and looks like the following 


SOAC Errors written to ../psf/tran.soac.err 

SOAC: M0.soac_m1    modp50h V(D,PSUB): LEAVING@    64.1728us    v=-20.5184 
SOAC: M0.soac_m1    modp50h V(D,S): LEAVING@    100.25us        v=-30.0422 
SOAC: M0.soac_m1    modp50h V(D,S): ENTERING@ 150.75us duration:50.5us
SOAC: M0.soac_m1    modp50h V(D,S): LEAVING@    200.25us        v=-48.5288 
SOAC: M0.soac_m1    modp50h V(D,S): ENTERING@ 281.457us duration:81.2us
SOAC: M0.soac_m1    modp50h V(D,S): LEAVING@    300.25us        v=-48.4789 
SOAC: M0.soac_m1    modp50h V(D,S): ENTERING@ 350.75us duration:50.5us
SOAC: M0.soac_m1    modp50h V(D,PSUB): ENTERING@ 435.838us duration: 372us
SOAC: M0.soac_m1    modp50h V(D,S): LEAVING@    564.181us       v=20.1611 
SOAC: M0.soac_m1    modp50h V(D,PSUB): LEAVING@    718.639us    v=50.109 
SOAC: M0.soac_m1    modp50h V(D,PSUB): ENTERING@ 781.566us duration:62.9us
SOAC: M0.soac_m1    modp50h V(D,S): ENTERING@ 935.854us duration: 372us

SOAC Analysis ended

Note: for Corner Analysis the error file can be found under: <simulation directory>/<circuit name>/spectre/schematic/Corner<number>/<analysis>.soac.err

 

Safe Operating Area Graphical User Interface

The graphical user interface for SOAC can be started after the spectre Simulation has finished: Schematic Window

    HIT-Kit Utilities->SOAC PostProcessor

SOAC

The SOAC PostProcessor shows the list of occurred SOA violations and enables a crossprobing between Schematic Window and Waveforms. Selecting a line in the SOAC tool will automatically highlight the involved device in the Schematic and the node-voltages are displayed in the Waveforms Window.
The Designer can now examine the violation and, if applicable, he can mark the error as fixed - if he is sure that this violation can be neglected.
There are different buttons to filter the data which is displayed in the SOAC tool.

  • Error File: - enables the designer to select the SOAC error file to be examined
  • Sort by - sorting of the list by Time, Instance and Parameter
  • Show - filters the data to be displayed, selections can be:
    • All - shows all violations
    • Only not fixed - shows only violations which have not been marked as fixed
    • Only fixed - shows violations which have been marked as fixed
    • Leaving only - shows only the violation when Device is leaving the SOA
    • Entering only - shows only the violation when Device is entering the SOA
  • Mark line as fixed - marks the selected line as fixed
  • Line as fixed - marks the selected line as not fixed
  • Mark Device as fixed - marks all lines involving the the selected Device as fixed
  • Device not fixed - marks all lines involving the the selected Device as not fixed
  • Mark as fixed: Time [us] - marks all violations with a duration shorter than the specified value as fixed
  • All not fixed - marks all lines as not fixed
  • Save - file with the fixed tags can be stored to disc

 

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