HIT-Kit v3.70: Release Notes (Mentor)

 

September 2005

This new HIT-Kit v3.70, qualified for Mentor IC-Flow 2005.1 and for the technologies

  • 0.35µm C35B3 (CMOS, 3-metal)
  • 0.35µm C35B4 (CMOS, 4-metal)
  • 0.35µm S35D3 (SiGe, 3-metal)
  • 0.35µm S35D4 (SiGe, 4-metal)
  • 0.35µm H35B3 (HV CMOS, 3-metal) -> For H35 please use only HIT-Kit v3.71
  • 0.35µm H35B4 (HV CMOS, 4-metal) -> For H35 please use only HIT-Kit v3.71

contains proven features, a variety of improvements and new extensions summarized in the following overview

 
 

0.35µm

Related Design  Documents
Notes The 0.35µm processes C35B3 and C35B4 are fully compatible with TSMC's 0.35µm CMOS Mixed-Signal process. 
The S35xx processes use the 0.35µm CMOS process as base process and add a high performance SiGe-BiCMOS module to it.
General
  • First Mentor HIT-Kit for the 0.35µm HV-CMOS processes H35B3 and H35B4
  • Qualified for Solaris  8/ 9 + Red Hat EL 3.0
  • Support for IC-Flow 2005.1 including ICstudio and classic DA-IC and IC-Station. First HIT-Kit that supports ICstudio!
  • New startup script ams_icstudio to run ICstudio with the correct austriamicrosystems technology setup and libraries
  • Layout verification tool Calibre 2005.1
  • Modified Calibre rule files including checks related to the exact process option
  • Extended groups of checks that can be enabled/disabled for DRC on demand (see also IC-Station Layout & Verification Flow)
  • Improved Parasitic Extraction with correct consideration of RF-Devices
  • Improved Eldo Monte Carlo simulation models
  • Save-Operating-Area Check (SOAC) supported
  • HIT-Kit Utilities menu within DA-IC and IC-Station including all austriamicrosystems specific utilities.
  • New functionality to translate Eldo- to Calibre Netlists for LVS and Calibre- to Eldo Netlists for Post Layout Simulation
  • Digital Standard Cells qualified to be used within Mentor P&R tool AutoCells
  • All standard cells also supported to be used with Cadence Silicon Ensemble for P&R
0.35µm C35xx
  • Design Rules, Process Parameter and Noise Parameter documents available on asic.austriamicrosystems.com/download.
  • Updated Calibre rule files for DRC, LVS and PEX
  • Updated Synopsys, VITAL, BuildGates, TLF and Verilog libraries
  • Updated datasheets with updated values for all CORE & IOLIBs.
  • Circuit Simulation models corresponding to document ENG-182
  • New RF-Devices pmosrf, rpolyhrf
  • RF-Devices now supported throughout the whole flow including parasitic extraction and post layout simulation
    (RFDEF layer on Device layouts for Device recognition)
  • RF-Device nmosrf changed
    Update old schematics using nmosrf devices - replace old nmosrf symbol by the new one!
  • LVT Devices currently not supported
  • CORELIB library (Digital Standard Cells) - now hierarchical - GATES library added - update & check old designs!
  • CORELIB_3B library (3-Bus Digital Standard Cells) - now hierarchical - GATES_3B library added - update & check old designs!
  • IOLIBC_3B_3M (new) core-ltd. library (3-Bus Dig. Input/Output/Bidirectional buffers & Power Pads)
  • IOLIBC_3B_4M (new) core-ltd. library (3-Bus Dig. Input/Output/Bidirectional buffers & Power Pads)
  • IOLIBC_ANA_3B_3M (new) core-ltd. library (3-Bus Analog Power Supply Pads & Analog I/O Pads)
  • IOLIBC_ANA_3B_4M (new) core-ltd. library (3-Bus Analog Power Supply Pad & Analog I/O Pads)
  • IOLIB_3M library (Digital Input/Output/Bidirectional buffers & Power Pads) available. 
  • IOLIB_4M library (Digital Input/Output/Bidirectional buffers & Power Pads) available.
  • IOLIB_3B_3M library (3-Bus Digital Input/Output/Bidirectional buffers & Power Pads) available.
  • IOLIB_3B_4M library (3-Bus Digital Input/Output/Bidirectional buffers & Power Pads) available.
  • IOLIBV5_3M library (Digital Input/Output/Bidirectional buffers & Power Pads; 5V Supply) available.
  • IOLIBV5_4M library (Digital Input/Output/Bidirectional buffers & Power Pads; 5V Supply) available.
  • IOLIB_ANA_3M library (Analog Power Supply Pads, Analog I/O Pads) available.
    New power supply cells - Update old schematics and replace old power supply cells!
  • IOLIB_ANA_4M library (Analog Power Supply Pads, Analog I/O Pads) available.
    New power supply cells - Update old schematics and replace old power supply cells!
  • IOLIB_ANA_3B_3M library (3-Bus Analog Power Supply Pads, Analog I/O Pads) available.
    New power supply cells - Update old schematics and replace old power supply cells!
  • IOLIB_ANA_3B_4M library (3-Bus Analog Power Supply Pads, Analog I/O Pads) available.
    New power supply cells - Update old schematics and replace old power supply cells!
  • A_CELLS library (Analog Standard Cells) available. 
    - New set of Bandgap references available (BG05A, BG06A).
    - Analog-Digital Converter ADC8 available.
  • SPIRALS_3M library (inductors)  available
  • SPIRALS_4M library (inductors)  available
  • SFCLIB_C35xx: Standard Family Cells libraries updated
0.35µm S35xx
  • Design Rules and Process Parameter documents available on asic.austriamicrosystems.com/download
  • Updated Calibre rule files for DRC, LVS and EXT available. 
  • Synopsys, VITAL, BuildGates, TLF and Verilog libraries available
  • Circuit Simulation models corresponding to doc ENG-219
  • New RF-Devices pmosrf, rpolyhrf, rpolybrf, cmimrf
  • RF-Devices now supported throughout the whole flow including parasitic extraction and post layout simulation
    (RFDEF layer on Device layouts for Device recognition)
  • RF-Device nmosrf changed
    Update old schematics using nmosrf devices - replace old nmosrf symbol by the new one!
  • Device jvar currently not supported
  • CORELIB library (Digital Standard Cells) - now hierarchical - GATES library added - update & check old designs!
  • CORELIB_3B library (3-Bus Digital Standard Cells) - now hierarchical - GATES_3B library added - update & check old designs!
  • IOLIBC_3B_3M (new) core-ltd. library (3-Bus Dig. Input/Output/Bidirectional buffers & Power Pads)
  • IOLIBC_3B_4M (new) core-ltd. library (3-Bus Dig. Input/Output/Bidirectional buffers & Power Pads)
  • IOLIBC_ANA_3B_3M (new) core-ltd. library (3-Bus Analog Power Supply Pads & Analog I/O Pads)
  • IOLIBC_ANA_3B_4M (new) core-ltd. library (3-Bus Analog Power Supply Pad & Analog I/O Pads)
  • IOLIB_3M library (Digital Input/Output/Bidirectional buffers & Power Pads)
  • IOLIB_4M library (Digital Input/Output/Bidirectional buffers & Power Pads)
  • IOLIB_3B_3M library (3-Bus Digital Input/Output/Bidirectional buffers & Power Pads)
  • IOLIB_3B_4M library (3-Bus Digital Input/Output/Bidirectional buffers & Power Pads)
  • IOLIBV5_3M library (Digital Input/Output/Bidirectional buffers & Power Pads; 5V Supply)
  • IOLIBV5_4M library (Digital Input/Output/Bidirectional buffers & Power Pads; 5V Supply)
  • IOLIB_ANA_3M library (Analog Power Supply Pads, Analog I/O Pads)
    New power supply cells - Update old schematics and replace old power supply cells!
  • IOLIB_ANA_4M library (Analog Power Supply Pads, Analog I/O Pads)
    New power supply cells - Update old schematics and replace old power supply cells!
  • IOLIB_ANA_3B_3M library (3-Bus Analog Power Supply Pads, Analog I/O Pads)
    New power supply cells - Update old schematics and replace old power supply cells!
  • IOLIB_ANA_3B_4M library (3-Bus Analog Power Supply Pads, Analog I/O Pads)
    New power supply cells - Update old schematics and replace old power supply cells!

  • A_CELLS library (Analog Standard Cells)
    - New set of Bandgap references available (BG05A, BG06A). 
    - Analog-Digital Converter ADC8 available.

  • SPIRALS_3M library (inductors)

  • SPIRALS_4M library (inductors)

  • RFPADS_4M (new) RF Pad Library, 4-met

  • RFPADS_3B_4M (new) RF Pad Library, 4-met, 3-Bus

  • SFCLIB_S35xx: Standard Family Cells libraries updated
0.35µm H35xx
  • Design Rules and Process Parameter documents available on asic.austriamicrosystems.com/download
  • Calibre rule files for DRC, LVS and PEX available
  • Synopsys, VITAL, BuildGates, TLF and Verilog libraries available
  • Circuit Simulation models corresponding to doc ENG-238
  • All primitive Devices supported throughout the complete flow
  • A_CELLS C35 library (Analog Standard Cells)
  • CORELIB C35 library (Digital Standard Cells)
  • CORELIB_3B library (3-Bus Digital Standard Cells)
  • CORELIB_HV Floating Digital Standard Cells
  • IOLIB_3M C35 library (Digital Input/Output/Bidirectional buffers & Power Pads)
  • IOLIB_4M C35 library (Digital Input/Output/Bidirectional buffers & Power Pads)
  • IOLIB_HV_3M Floating 3 Metal Digital Input/Output/Bidirectional buffers & Power Pads
  • IOLIB_HV_4M Floating 4 Metal Digital Input/Output/Bidirectional buffers & Power Pads
  • IOLIB_ANA_3M C35 library (Analog Power Supply Pads, Analog I/O Pads)
  • IOLIB_ANA_4M C35 library (Analog Power Supply Pads, Analog I/O Pads)
  • IOLIB_ANA_HV_3M High Voltage 3 Metal Analog Power Supply Pads, Analog I/O Pads for 20V and 50V
  • IOLIB_ANA_HV_4M High Voltage 4 Metal Analog Power Supply Pads, Analog I/O Pads for 20V and 50V
  • IOLIBV5_3M C35 library (Digital Input/Output/Bidirectional buffers & Power Pads; 5V Supply)
  • IOLIBV5_4M C35 library (Digital Input/Output/Bidirectional buffers & Power Pads; 5V Supply)
  • IOLIB_3B_3M C35 library (3-Bus Digital Input/Output/Bidirectional buffers & Power Pads)
  • IOLIB_3B_4M C35 library (3-Bus Digital Input/Output/Bidirectional buffers & Power Pads)
  • IOLIB_ANA_3B_3M C35 library (3-Bus Analog Power Supply Pads, Analog I/O Pads)
  • IOLIB_ANA_3B_4M C35 library (3-Bus Analog Power Supply Pads, Analog I/O Pads)
  • SFCLIB_H35xx: Standard Family Cells libraries

Trademarks


 		ModelSim, Calibre, ICstudio, DA-IC, IC-Station, AutoCells, ADMS, Eldo, ICnet, DMGR-IC and DVE-IC are trademarks of Mentor Graphics Corporation, Silicon Ensemble is a trademark of Cadence Design Systems, Inc., Sun and Solaris are registered trademarks of Sun Microsystems, Inc., HP-UX is a registered trademark of Hewlett-Packard Company. All other trademarks are the property of their respective owners.
Copyright (c) 2005 austriamicrosystems AG

Back to Top