Content of HIT-Kits v3.70
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austriamicrosystems Full Service Foundry provides two sets of v3.70 Process Design Kits:
Digital HIT-Kit for creating semi-custom ASIC designs using the Digital Standard Cells. It includes Standard Cell Libraries, Digital Simulation Libraries (Liberty, Synopsys, TLF/BuildGates, Verilog, Vital95), Simulation Parameters (Eldo, EldoS, HSpiceS, Spectre, SpectreS, SmartSpice, Smash, Saber, PSpice & ADSsim), Calibre & Assura Verification Rule Files, Design Checker, Pattern Converter, Revision Block Generator and Documentation.
Mixed-Signal HIT-Kit for creating custom Analog and Mixed-Signal designs. It is an extension to the Digital HIT-Kit and includes custom device generator (PCells), Package models, 3-Bus libraries, RF Pads, and a complete set of LV analog cells for mixed-mode designs and is therefore subject to license fee. |
Included libraries in HIT-Kit v3.70
| Cadence HIT-Kits | Mentor HIT-Kits |
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