Technical Seminar

 

austriamicrosystems AG

High-Voltage CMOS TECHNICAL SEMINAR

   www.austriamicrosystems.com

" DFM (Design-for-manufacturing) enhanced design flow for High- Voltage product design maximizes your yield "

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An introduction to austriamicrosystems' High-Voltage CMOS Processes and to the DFM-enhanced High-Voltage Designflow.

austriamicrosystems' High-Voltage CMOS process is a new generation advanced analog and mixed-signal technology ideally suited for a wide variety of applications; power management, motor control, printer head drivers, DC/DC converters, switched power supplies, LCD drivers and backlight controllers, to name a few. Designing High-Voltage products using austriamicrosystems DFM design flow, ensures optimization towards yield and robustness of the design.

austriamicrosystems' "Full Service Foundry" philosophy is to work with its customers to offer an optimal solution for first time right silicon including extended design support services. As part of this service austriamicrosystems is pleased to announce a complimentary half day High-Voltage Workshop with the focus on DFM. ChipMD-MunEDA, one of the leading provider of DFM-DFY EDA software, will present the newest version of its design analysis and yield optimization tool WiCkeD-DesignMD.

During this Seminar there will be the opportunity to discuss (both formally and informally) many aspects of the High-Voltage technology and design techniques with experienced users of this new generation process.

 

  Agenda


  12:30 pm -1:00 pm:   Registration and Coffee
  1:00 pm - 1:10 pm:   Welcome and Introduction
  1:10 pm - 1:30 pm:   Technology Roadmap update
  1:30 pm - 2:15 pm:   High-Voltage Technology Overview
  2:15 pm - 2:30 pm:   Non-Volatile Memories in the HV Process
  2:30 pm - 3:00 pm:   High-Voltage DFM Design Flow
  3:00 pm - 3:15 pm:   Coffee Break
  3:15 pm - 4:30 pm:   High-Voltage Design Examples
  4:30 pm - 5:15 pm:   DFM-Tool Presentation by CHIPMD-MunEDA
  5:15 pm - 5:45 pm:   Questions and Answers
  5:45 pm              Cocktails - open discussions

Date: Tuesday, October 4th, 2005

Venue: Hilton San Jose & Towers
300 Almaden Boulevard, San Jose, CA 95110
United States

Seating for this seminar is limited; to ensure your place, please simply click on the "Register" link below and provide your contact details (name, company & telephone number) and the number of seats you require. 

COST: Free to attend

Please click below to register

[Register]

  Description of the seminar

This seminar focuses on current best practices for implementing High-Voltage designs from specification to working silicon. austriamicrosystems' technology roadmap will be presented. The 0.35µm High-Voltage CMOS process will be described with cross sections and SEM micrographs. 0.35µm High-Voltage products, currently in manufacturing, will be shown with a focus on demonstrating the integration and performance capability of the technology. austriamicrosystems DFM-enhanced reference High-Voltage design flow will be presented, which utilizes specific analog/High-Voltage DFM tools such as design and layout verification of circuit robustness, yield centering, parasitic simulation or safe operating area check. A presentation of a DFM-tool will conclude the seminar. ChipMD-MunEDA, one of the leading provider of DFM-DFY EDA software, will present the newest version of its design analysis and yield optimization tool WiCkeD-DesignMD on austriamicrosystems' High-Voltage process.

For more information, please contact Jolyne Wagner at 1-919-676-5292 or  foundry@austriamicrosystems.com now!

More information about CHIPMD-MunEDA can be found at www.chipmd.com or at www.muneda.com

  Description of the High-Voltage CMOS process
The new High-Voltage CMOS process is a fully modular proprietary extension of austriamicrosystems' production proven 0.35µm CMOS technology, which was transferred from TSMC, thus enabling optimum reuse of low voltage CMOS IP. The purely CMOS based HV process provides a comprehensive portfolio of 20V and 50V devices and requires only few additional masks on top of the standard C35 process. The outstanding performance (comparable to BCD processes) and the cost effective concept makes this technology very attractive for High-Voltage designers. 

Key Facts:

  • Very low "on resistance" HV devices for improved performance and smaller die-sizes
  • Fully isolated low voltage devices
  • Fully modular and compatible to 0.35µm CMOS TSMC base process
  • Industry leading Process Design Kit available with fully characterized models
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  • up to 4 metal levels, power metal available

More information can be found at www.austriamicrosystems.com

 
austriamicrosystems is a member of the Fabless Semiconductor Association since 2000 and a Platinum Sponsor of the 2005 FSA Suppliers Expo to be held on October 5th at the McEnery Convention Center in San Jose, California. Please visit us at booth 502/504.
Copyright (c) 2005 by austriamicrosystems AG, A - 8141 Unterpremstaetten, Austria. All rights reserved. 


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