The Concept of Power-Cut Cells

 

These cells are used for separation between different supplies and are available for the padlimited and corelimited version of periphery cells.

Types of Power-Cut Cells

Different types of Power-Cuts exist in our library. They are treated as Glue-Cells and can be found in HRDLIB, category GLUE_CELLS.
There are 4 choices of Power-Cut cells. They differ in the protection elements placed in the gap between the power and ground buses:

  • VSS: antiparallel diodes, VDD: antiparallel diodes
  • VSS: antiparallel diodes, VDD: snapback device
  • VSS: snapback device, VDD: antiparallel diodes
  • VSS: snapback device, VDD: snapback device

In all versions the substrate bus near the scribe line is protected with a pair of antiparallel diodes.

 

Naming of Power-Cut Cells

The names of the Power-Cut cells follow the syntax:

    PWRCUT_<Design Type>_<Pad-Version>_<Device between VSS>_<Device_between_VDD>
  • Design Type
    		• ........... ANA or DIG
  • Pad-Version
    		• ........... P for padlimited or C for corelimited
  • Device between VSS
    		• ........... SNAP or DIODE
  • Device between VDD
    		• ........... SNAP or DIODE

    For example: PWRCUT_ANA_P_DIODE_SNAP means

  • ANA
    		• ........... placing between two Analog-Supply
  • P
    		• ........... padlimited Version
  • DIODE
    		• ........... antiparallel Diodes between VSS
  • SNAP
    		• ........... SNAP-Device between VDD

    Following cells exist:

    Cell Name Purpose
    PWRCUT_DIG_P_DIODE_DIODE Power-Cut for padlimited digital Peri-Cells
    PWRCUT_DIG_C_DIODE_DIODE Power-Cut for corelimited digital Peri-Cells
    PWRCUT_ANA_P_DIODE_DIODE Power-Cut for padlimited analog Peri-Cells
    PWRCUT_ANA_C_DIODE_DIODE Power-Cut for corelimited analog Peri-Cells
    PWRCUT_DIG_P_DIODE_SNAP Power-Cut for padlimited digital Peri-Cells
    PWRCUT_DIG_C_DIODE_SNAP Power-Cut for corelimited digital Peri-Cells
    PWRCUT_ANA_P_DIODE_SNAP Power-Cut for padlimited analog Peri-Cells
    PWRCUT_ANA_C_DIODE_SNAP Power-Cut for corelimited analog Peri-Cells
    PWRCUT_DIG_P_SNAP_DIODE Power-Cut for padlimited digital Peri-Cells
    PWRCUT_DIG_C_SNAP_DIODE Power-Cut for corelimited digital Peri-Cells
    PWRCUT_ANA_P_SNAP_DIODE Power-Cut for padlimited analog Peri-Cells
    PWRCUT_DIG_P_SNAP_SNAP Power-Cut for padlimited digital Peri-Cells
    PWRCUT_DIG_C_SNAP_SNAP Power-Cut for corelimited digital Peri-Cells
    PWRCUT_ANA_P_SNAP_SNAP Power-Cut for padlimited analog Peri-Cells

    Existence of Cells

    1.The VSS bus at the scribelane (substrate bus) always has antiparallel diodes (DIODE).
    2.For the following one or two buses all combinations of DIODE or SNAPs are available.
    3.When there are 5 buses (digital padlimited cells) the last two buses have the same combinations as the previous two buses.

    When this is applied to the different cell groups following powercut cells come into existence: 

                                    Protection between
Cell Group/Name                 VSS-Substrate   1.VDD   2.VSS   3.VSS   2.VDD 

Digital Padlimited:
PWRCUT_DIG_P_DIODE_DIODE        DIODE           DIODE   DIODE   DIODE   DIODE
PWRCUT_DIG_P_DIODE_SNAP         DIODE           SNAP    DIODE   DIODE   SNAP
PWRCUT_DIG_P_SNAP_DIODE         DIODE           DIODE   SNAP    SNAP    DIODE
PWRCUT_DIG_P_SNAP_SNAP          DIODE           SNAP    SNAP    SNAP    SNAP    

Digital Corelimited:
PWRCUT_DIG_C_DIODE_DIODE        DIODE           DIODE   DIODE     *)      *)
PWRCUT_DIG_C_DIODE_SNAP         DIODE           SNAP    DIODE     *)      *)
PWRCUT_DIG_C_SNAP_DIODE         DIODE           DIODE   SNAP      *)      *)
PWRCUT_DIG_C_SNAP_SNAP          DIODE           SNAP    SNAP      *)      *)

Analog Padlimited:
PWRCUT_ANA_P_DIODE_DIODE        DIODE           DIODE   DIODE     *)      *)
PWRCUT_ANA_P_DIODE_SNAP         DIODE           SNAP    DIODE     *)      *)
PWRCUT_ANA_P_SNAP_DIODE         DIODE           DIODE   SNAP      *)      *)
PWRCUT_ANA_P_SNAP_SNAP          DIODE           SNAP    SNAP      *)      *)


PWRCUT_ANA_C_DIODE_DIODE        DIODE           DIODE    *)       *)      *)
PWRCUT_ANA_C_DIODE_SNAP         DIODE           SNAP     *)       *)      *)

*)  This bus does not exist in this cell group

     

    Selection Criteria

    (See also LV ESD Design Rule Document Nr. ENG-41)
    Whenever there is an operating voltage difference between the buses, the snapback device must be used. When there is no operating voltage difference between the buses, the antiparallel diodes are preferred.
    There may be cases of equal voltages, but difference in the noise generated between the buses (e.g. switching of digital buffers on one side, sensitive analog circuits on the other side), In such cases the designer of the circuit has to decide if antiparallel diodes are acceptable.

    To interface between two different types of power bus systems (e.g. between digital pad-limited and analog core-limited) choose the power cut cell with more power buses.

    Note: All power buses must be connected, e.g. the two VDD buses on the digital side will then be connected via protection elements to only one VDD bus on the analog side.

    ATTENTION: Don't use these cells for voltages greater than 7 Volt above substrate (e.g. CXT high voltage process !!).

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