CP1LS

Low Voltage Comparator
LV Input, LV Output

 

Functional Description

CP1LS is a static comparator without hysteresis. The comparator has a PMOS input stage.
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Key Features

  • Power Supply: VDDA = 5V
  • VSSA connected to Substrate
  • External biasing


    • Height: 39 µm
    Width: 77 µm
    Area: 3 000 µm²

Pin List

PinDescriptionCapacitance
INP Non inverting input 0.5pF
INN Inverting input 0.5pF
OUT Analog output -
IBP Bias Source Input -
VDDA Power Supply -
VSSA Analog Ground -
Substrate Connetced to VSSA -

 

Electrical Parameters

Conditions:
  • Bias Source Current IBP=5µA -Typical
CP1LS 0.8 µm CXT/Y/Z
Parameter Symbol Min Typ Max Unit
Power Supply Range  Vdda 4.50 5.00 5.50 V
Temperature Range  Temp  -40 25 85 deg 
AC Parameters   
Open Loop Gain  A0  115 117 123 dB 
Common Mode Rejection Ratio  CMRR 91 92 96 dB
Power Supply Rejection Ratio Vdd PSRRvdd 87 88 92 dB
Power Supply Rejection Ratio Vss PSRRvss 97 98 100 dB
DC Parameters   
Input Offset Voltage  Vos -15   15 mV
Power Supply Current  Idd 11.9 17.6 27.6 µA
Power Consumption  PVdd 53.5 87.9 152.0 µW
Output Source Current Isource 0.50 0.70 0.98 mA
Output Sink Current Isink 0.37 0.56 0.91 mA
Common Mode Input Range CMIR(L) 0.24 0.30 0.33 V
VDDA - CMIR(H) 0.32 0.47 0.65 V
Output Range (Rl = 10.0 MOhm) Vout(L)   0   V
VDDA - Vout(H)   0   V
Transient Parameters   
Response Time step=+100mV; overdrive=+10mV tdrise 0.11 0.15 0.20 µs
Response Time step=-100mV; overdrive=-10mV tdfall 0.22 0.31 0.41 µs
Noise Parameters   
Equivalent Input Noise @10Hz  EN(10Hz) - 2.31 - µV/sqrt(Hz)
Equivalent Input Noise @100KHz  EN(100Hz) - 46.6 - nV/sqrt(Hz)

 
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