Voltage and Current Levels for 5V Nominal Supply Voltage

 

Junction Temperature Tj = 0 to 70°C

Inputs

TypeCell Name VilVih Iil (1) Iih (2) Note
minmax minmax
AIB15 IOF3 30%70% NA-1.0µA NA1.0µA CMOS (3)
BIB35 IO63 30%70% -30µA-100µA NANA CMOS w/pullup (3)
CIB55 IO33 30%70% NANA 30µA100µA CMOS w/pulldown (3)
DIB75 IOE3 0.8V2.0V NA-1.0µA NA1.0µA TTL
EIB95 IO43 0.8V2.0V -30µA-100µA NANA TTL w/pullup
FIBD5 1.1V3.9V NA-1.0µA NA1.0µA Schmitt Trigger (ST) (4)
FSIBD5 see below NA-1.0µA NA1.0µA Schmitt Trigger (4)

 
Schmitt Trigger Input Data
Type Characteristics Conditions Minimum Maximum
FS Negative-Going Treshold Vt- VDD=4.5V
VDD=5.5V
1.1V
1.4V
1.6V
1.9V
Positive-Going Treshold Vt+ VDD=4.5V
VDD=5.5V
2.8V
3.4V
3.2V
3.9V

NOTES: (1) Iil is tested at VDD = 5.5V and Vin = 0V
(2) Iih is tested at VDD = 5.5V and Vin = 5.5V
(3) CMOS input levels are in percentage of VDD
(4) for a supply voltage range 4.5V <= VDD <= 5.5V

Outputs

TypeCell Name Vol Voh Iol (2) Ioh (3) Ioz (4) Note
VV mAmAµA
Z OB33 IOE3 IOF3 0.44.0 4.0-4.0NA SP (5) CMOS
Y OB35 0.44.0 8.0-8.0NA DP (5) CMOS
X OB63 IO43 IO63 0.44.0 NA-4.0-10 SP (5) opendrain pullup (1)
W OB83 IO33 0.44.0 4.0NA10 SP (5) opendrain pulldown (1)
V OB93 0.44.0 4.0-4.0±10 SP (5) tristate

NOTES: (1) At test time a 1.5 kOhm resistor is tied to VSS or VDD on open drain device to force a signal level when the device is in a high-impedance state.
(2) Vol, Iol is tested at VDD = 4.5V
(3) Voh, Ioh is tested at VDD = 4.5V
(4) Ioz is tested with VDD = 5.5V
(5) SP...single power output, DP...double power output