c35 Cells: DFC1

 

DFC1 is a static, master-slave D flip-flop with 1x drive strength. CLEAR is asynchronous and active low.
Truth table Symbol Capacitance
CDRNQQN
R 0 1 0 1
R 1 1 1 0
X X 0 0 1
DFC1-Symbol
PinCap [pF]
C 0.004
D 0.005
RN 0.011
Area Power
0.480 mil²
310 µm²
1.22 µW/MHz
AC Characteristics
Delay[ns] = f(SL, L), Output Slope [ns] = f(SL, L) with SL = Input Slope [ns] and L = Output Load [pF]

AC Characteristics: Tj = 25°C VDD=3.3V Typical Process

RiseFall
Slope [ns]0.0520.052
Load [pF]0.0010.320.0010.320.0010.320.0010.32
Delay C => Q 0.47 2.11 0.65 2.29 0.61 1.68 0.79 1.85
Delay C => QN 0.72 2.35 0.89 2.52 0.56 1.60 0.74 1.78
Delay RN => Q n.a. n.a. n.a. n.a. 0.16 1.22 0.53 1.60
Delay RN => QN 0.31 1.95 0.70 2.34 n.a. n.a. n.a. n.a.
Slew C => Q 0.10 4.22 0.10 4.22 0.09 2.36 0.09 2.36
Slew C => QN 0.10 4.22 0.10 4.22 0.07 2.35 0.07 2.36
Slew RN => Q n.a. n.a. n.a. n.a. 0.08 2.35 0.12 2.35
Slew RN => QN 0.12 4.22 0.12 4.22 n.a. n.a. n.a. n.a.
SetupHold
risefallrisefall
D => C 0 0 0.021 0.102
RN => C 0 n.a. 0.411 n.a.
Min Width
HighLow
C 0.33 0.391
RN n.a. 0.241